Dynamic Simulation of CNTFET-Based Digital Circuits

Abstract

<em>In this paper we propose a simulation study to carry out dynamic analysis of CNTFET-based digital circuit, introducing in</em><em> the semi-empirical compact model for CNTFETs, already proposed by us</em><em>, both</em><em> the quantum capacitance effects and the sub-threshold currents. To verify the validity of the obtained results, a comparison with Wong model was carried out. Our model may be easily implemented both in SPICE and in Verilog-A, obtaining, in this last case, the development time in writing the model shorter, the simulation run time much shorter and the software much more concise and clear than Wong model.</em>