High Speed Full Swing Current Mode BiCMOS Logical Operators

Abstract

In this paper the design of a new high-speed current mode BiCMOS logic circuits isproposed. By altering the threshold detector circuit of the conventional current mode logic circuitsand applying the multiple value logic (MVL) approach the number of transistors in basic logicoperators are significantly reduced and hence a reduction of chip area and power dissipation as wellas an increase in speed is achieved. Simulation with HSpice using BSIM 3V3 model and experimental65nm BiCMOS technology were carried out for speed, and power consumption considerations atdifferent supply voltage levels. Finally the performance of the proposed circuit is compared to an 8 bitvoltage mode adder.